METHOD FOR FORMING MULTILAYER METAL WIRING OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for forming a multilayer metal wiring of a semiconductor device is provided to reduce a malfunction caused by a contact resistance between metal wirings when performing a multilayer wiring process by using a silicon epitaxial layer. CONSTITUTION: An interlayer dielectric(60) is deposited on a lower metal wiring(20) of a polycide structure. A contact hole is formed to expose the lower metal wiring on the interlayer dielectric. A silicon epitaxial layer(70) is grown on the lower metal wiring exposed in the contact hole. An upper metal wiring(30) of a polycide structure is formed to be connected to the lower metal wiring via the contact hole. Thereby, the method for forming a multilayer metal wiring of a semiconductor device reduces caused by a contact resistance between metal wirings when performing a multilayer wiring process.