发明名称 |
Non-volatile memory controller with error correction (ECC) tuning via error statistics collection |
摘要 |
A non-volatile memory controller for a solid state drive includes a soft-decision LDPC decoder. The soft-decision LDPC decoder includes a probability generation module. A processor reads collected statistics collated from decoded frames and tunes the performance of the soft-decision LDPC decoder performance. Additional parameters may also be taken into account, such as the scramble seed and the type of non-volatile memory. An asymmetry in errors may also be detected and provided to a hard-decision LDPC decoder to adjust its performance. |
申请公布号 |
US9407294(B2) |
申请公布日期 |
2016.08.02 |
申请号 |
US201414325244 |
申请日期 |
2014.07.07 |
申请人 |
Kabushi Kaisha Toshiba. |
发明人 |
Hanham Paul Edward;Symons David Malcolm;Buxton Neil |
分类号 |
G06F11/00;G06F11/07;H03M13/00;H03M13/11;H03M13/37;H03M13/45;G06F11/10;G11C29/04 |
主分类号 |
G06F11/00 |
代理机构 |
White & Case LLP |
代理人 |
White & Case LLP |
主权项 |
1. A method of decoding non-volatile memory pages of a non-volatile memory, comprising:
collating error statistics in a decoded output of a soft-decision Low Density Parity Check (LDPC) decoder utilizing a probability to decode the non-volatile memory pages, the probability based on a set of soft-decision read values; and updating, based on the error statistics, a probability lookup table (LUT) used to determine, from the set of soft-decision read values, the probability of a bit in the non-volatile memory page having a particular binary value. |
地址 |
Tokyo JP |