发明名称 Manufacturing method of pixel structure with data line, scan line and gate electrode formed on the same layer
摘要 A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.
申请公布号 US9449998(B2) 申请公布日期 2016.09.20
申请号 US201514977562 申请日期 2015.12.21
申请人 Au Optronics Corporation 发明人 Huang Te-Chun;Lin Hsiang-Lin;Huang Kuo-Yu
分类号 G02F1/1343;H01L27/12;G02F1/1333;G02F1/1345;G02F1/1362;G02F1/136 主分类号 G02F1/1343
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A method of manufacturing a pixel structure, comprising: forming a patterned first conductive layer on a substrate to form a scan line, a gate electrode and a linear transmitting part, the gate electrode connected to the scan line, and the linear transmitting part and the scan line separated from each other, wherein an extending direction of the scan line is crossed to an extending direction of the linear transmitting part; forming a first insulating layer on the substrate to cover the scan line, the gate electrode and the linear transmitting part; forming an oxide channel on the first insulating layer above the gate electrode; forming a second insulating layer on the first insulating layer and the oxide channel, wherein the second insulating layer comprises an etching blocking pattern located on the oxide channel and the gate electrode, and an isolation pattern located on the linear transmitting part, wherein the etching blocking pattern is located within a boundary of the gate electrode and not in direct contact with the first insulating layer, the isolation pattern contacts the first insulating layer, and the etching blocking pattern and the isolation pattern of the second insulating layer are not continuous and do not directly contact each other; forming a patterned second conductive layer on the second insulating layer to form a source electrode, a drain electrode, a cross-line transmitting part and a common electrode, the source electrode and the drain electrode located at two sides of the oxide channel, the cross-line transmitting part crossing over the scan line, and the common electrode disposed on the isolation pattern above the linear transmitting part; and forming a first pixel electrode on the substrate to be connected to the drain electrode.
地址 Hsinchu TW