发明名称 MULTI-FRAME SYNCHRONIZING CIRCUIT
摘要 <p>PURPOSE:To reduce the circuit scale by providing a counter means used selectively for a reference pulse generating means and a synchronization protection means with a selection signal. CONSTITUTION:A state transit counter 31 acts like a reference pulse generating means generating a reference pulse by a selection signal of a select signal generating circuit 41, a multi-frame pattern detection circuit 11 detects a multi- frame pattern in an input data to advance the counter 31 and when the counter counts up a prescribed number, a reference pulse is generated. On the other hand, a coincidence detection circuit 20 detects coincidence of the multi-frame pattern detection signal in the timing of the reference pulse and the counter 31 is switched by a selection signal of the select signal generating circuit 41 to act like a synchronization protection means and the counter counts the synchronization protection state.</p>
申请公布号 JPH0477023(A) 申请公布日期 1992.03.11
申请号 JP19900188838 申请日期 1990.07.16
申请人 FUJITSU LTD 发明人 KAMOI NOBUHISA;HAYAMA YUTAKA;IKUTA KOJI
分类号 H04L7/08 主分类号 H04L7/08
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