摘要 |
PURPOSE:To suppress clock skew without enlarging the buffer size by applying a clock signal to one input of a differential amplifier, applying a constant voltage to the other input and applying a signal extracted from the inverted output or non-inverted output of the differential amplifier to an internal circuit. CONSTITUTION:A clock signal CLKLOCAL to be transmitted through a transmission line provided with a buffer or wiring to the internal circuit of a semiconductor chip is applied to one input (+) of a differential amplifier 20. A constant potential VREF is applied to another input (-). Corresponding to this potential, the transition time of a non-inverted output CLKOUT of the differential amplifier 20 is changed. While the potential on the reference side (-) is set at a low level, for example, when the potential on the comparison side (+) is enlarged a little, the output state is immediately transited but while the potential on the reference side (-) is set at a high level, the output state is not transited until the potential on the comparison side (+) is increased to a high level. Therefore, the skew can be suppressed by adjusting the transition time of the output. |