| 摘要 |
A processor provides trace synchronization information to ensure that address information for reconstructing instruction execution flow is provided in trace records with sufficient frequency. A trace record is provided for instructions that change the program flow such as conditional branches. However, target address information is not provided in the trace record for such instructions as conditional branches, only an indication of whether the branch was taken. Target address information is provided, however, for those instructions in which the target address is in some way data dependent. The processor determines whether each trace record includes address information. Each trace entry providing address information causes a counter to be reloaded to a predetermined value which is the desired maximum number of trace records generated before current program address information is provided. The counter counts each trace record produced which does not include address information. When the count of such trace records reaches the predetermined number, trace logic provides the current program address as a trace entry, thereby providing trace synchronization information.
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