发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce jitter in the output of a PLL caused by the charge share between a charge pump and a loop filter and to widen the loop band of the PLL. SOLUTION: A phase locked loop circuit is constituted in such a way that the circuit is switched so that a current source may always be connected to the output of an operational amplifier constituted in one stage and, at the same time, the potentials at the junctions between current sources 1 and 2 and switches S1 and S3 may be fixed, by the use of power sources 1-4 and switches S1-S6 which are turned on/off according to the output signals UP, UPB, DN and DNB of the output signals from a phase comparator. Thus, the occupying area of the loop circuit on an integrated circuit can be reduced and the band of the PLL of the loop circuit can be widened, because the influence of stray capacitance can be suppressed and, in addition, no phase compensating circuit is required.
申请公布号 JP2000286700(A) 申请公布日期 2000.10.13
申请号 JP19990088402 申请日期 1999.03.30
申请人 HITACHI LTD 发明人 KOKUBO MASARU;HOAN CHANG
分类号 H03L7/093;H03L7/089 主分类号 H03L7/093
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