| 摘要 |
PURPOSE: A test mode circuit is provided to perform various kinds of test modes respectively by using only two control signals and reset signal lines. CONSTITUTION: A control signal generating part(3) generates a first control signal and s second control signal in response to an address signal. A test signal generator(4) generates test signals. One or more test signal of the test signals is enabled in response to the first control signal and the second control signal. A test performing part(5) performs a test in response to the test signal. The control signal generating part comprises a decoder which outputs the first control signal and the second control signal by decoding the address signal. The test signal generator comprises a selection signal generation part and a test signal output part. The selection signal generation part generates a plurality of selection signals in response to the first control signal. The test signal output part outputs the selection signal as a test signal. The test signal output part controls an output operation of the test signal in response to the second control signal.
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