发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To avoid noise margin defect caused by the potential fluctuation of a source system by a method wherein the delay time of one of a plurality of output circuit cells which are connected in parallel is differred from the delay times of the other cells. CONSTITUTION:Output circuits B1 and B2 have identical functions and are connected in parallel in order to improve output driving capability but the circuits are constituted to have delay times different from each other. Respective CMOS inverer circuits are composed of P-type channel MOS transistors Q1 and Q2 and N-type channel MOS transistors Q3 and Q4 and the output buffer function is provided by series connection. The output driving capability is determined by the capabilities of the transistors Q2 and Q4 and the delay times of the output circuits are roughly determined by the capabilities of the transistors Q1 and Q3. With this constitution, by creating discrepancy of the delay times of the output circuits connected in parallel, the potential fluctuation of a source system can be suppressed and AC noise margin can be increased so that more output circuits can be connected in parallel and the restriction of the number of the output circuits which are operated simultaneously can be relieved.
申请公布号 JPS62249449(A) 申请公布日期 1987.10.30
申请号 JP19860093610 申请日期 1986.04.22
申请人 NEC CORP 发明人 HATANO TSUTOMU
分类号 H01L21/82;H01L21/822;H01L27/04 主分类号 H01L21/82
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