发明名称 ARRANGEMENT OF MICRO-I/O PINS AND ITS MANUFACTURE
摘要 PURPOSE: To provide a micro input-output pin array which can be optimumly reduced in weight, thickness, length, and size when the array is directly connected to the package substrate of an IC chip, can be reduced in cost, and can be increased in transmitting speed by passing many conductive pins having head sections and leg sections through an electrical insulating substrate in the thickness direction at prescribed intervals in the surface direction. CONSTITUTION: Many conductive pins 1 having head sections 3 and leg sections 4 extended from the head sections 3 are passed through an electrical insulating substrate 2 in the thickness direction at prescribed intervals in the surface direction so that the top faces of the head sections 3 and end faces of the leg sections 4 are substantially flushed with the facing surfaces of the substrate 2, respectively. In addition, conductive brazing material bodies 5 and 6 are integrally formed with the top faces of the head sections 3 and end faces of the leg sections 4 so that the bodies 5 and 6 can be protruded from the facing surfaces of the substrate 2. It is preferable to set the total length of the pins 1 and the diameters of the head sections 3 and leg sections 4 to 0.2-0.3mm, 0.1-0.15mmϕ, and 0.05-0.1mmϕ, respectively, and the arranging pitches of the pins 2 in the longitudinal and transversal directions of the substrate at 0.5mm. It is also preferble to form the substrate 2 of an elastic resin.
申请公布号 JPH01175761(A) 申请公布日期 1989.07.12
申请号 JP19870336770 申请日期 1987.12.30
申请人 AMP INC 发明人 NAKAMURA KEIICHI;OSHIMA TSUTOMU;KUROKAWA NORIJI
分类号 H01L23/50;H01L23/52 主分类号 H01L23/50
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