| 摘要 |
<p>PURPOSE:To provide a microcomputer which can have its program corrected at plural places by one dummy ROM interruption processing circuit without increasing the capacity of a RAM irrelevantly to the number of the correction places. CONSTITUTION:This system consists of the (one-chip) microcomputer 1 and an EEPROM 12 which are both connected to a serial i/O bus 11 and can have a mutual communication, and a correction data writing device 13. The microcomputer 1 is constituted of a CPU 2, a RAM 3, a ROM 4, a pseudo ROM processing circuit 5, and a serial i/O part 8 through an internal bus 9. A desired address value for an interruption process for modifying the program in the ROM 4 is previously set in the pseudo ROM process circuit 5 and when the desired value is reached, the CPU 2 is automatically made to perform the interruption process, thereby executing a program other than that in the ROM 4 during the execution of the program in the ROM 4.</p> |
