发明名称 Semiconductor integrated circuit and method of fabricating the same
摘要 To provide a semiconductor integrated circuit device in which an occupied area is suppressed from increasing and a high-performance test circuit is included, There is provided a semiconductor integrated circuit having a test circuit, by determining arrangement positions of cells forming a circuit to be tested and non-connected cells prepared to form a test circuit and then determining a connection relationship among the non-connected cells prepared to form the test circuit on the basis of the arrangement information to thereby form the test circuit.
申请公布号 US2007089014(A1) 申请公布日期 2007.04.19
申请号 US20060542271 申请日期 2006.10.04
申请人 ISHIMURA TAKASHI;UDA KENICHIRO;SHIMADA YOKO;FUJIMURA KATSUYA;HAMAGUCHI KASUMI;HIGASHI KENICHIROU 发明人 ISHIMURA TAKASHI;UDA KENICHIRO;SHIMADA YOKO;FUJIMURA KATSUYA;HAMAGUCHI KASUMI;HIGASHI KENICHIROU
分类号 G01R31/28;G06F11/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址