发明名称 MULTICORE ABNORMALITY MONITORING DEVICE
摘要 A monitoring side core has an input protection part including an access checking part and an address information storage part. Address information of a count RAM area and an access prohibiting mode to the address are stored in the address information storage part in advance by CPU. The access checking part determines whether an address to be accessed through a first communication path by a monitored side core and an access mode are coincident with the stored address and the stored access prohibiting mode. When the coincidence is determined, the access of the monitored side core to the count RAM area of the monitoring side core is prohibited.
申请公布号 US2009013217(A1) 申请公布日期 2009.01.08
申请号 US20080165964 申请日期 2008.07.01
申请人 DENSO CORPORATION 发明人 SHIBATA KENJI;IHARA HIROYUKI
分类号 G06F11/30 主分类号 G06F11/30
代理机构 代理人
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