发明名称 Discrete Three-Dimensional One-Time-Programmable Memory
摘要 The present invention discloses a discrete three-dimensional one-time-programmable memory (3D-OTP). It comprises at least a 3D-array die and at least a peripheral-circuit die. At least a peripheral-circuit component of the 3D-OTP arrays is located on the peripheral-circuit die instead of the 3D-array die. The 3D-array die and the peripheral-circuit die have substantially different back-end-of-line (BEOL) structures.
申请公布号 US2016189791(A1) 申请公布日期 2016.06.30
申请号 US201615062116 申请日期 2016.03.06
申请人 ZHANG Guobiao 发明人 ZHANG Guobiao
分类号 G11C17/16;H01L23/532;H01L25/18;H01L23/528;H01L27/112;H01L23/525;G11C17/18;G11C5/02;H01L25/065 主分类号 G11C17/16
代理机构 代理人
主权项 1. A discrete three-dimensional one-time-programmable memory (3D-OTP), comprising: a 3D-array die comprising at least a 3D-OTP array, wherein said 3D-OTP array comprises a plurality of vertically stacked 3D-OTP cells; a peripheral-circuit die comprising at least an off-die peripheral-circuit component of said 3D-OTP array, wherein said off-die peripheral-circuit component is absent from said 3D-array die; means for coupling said 3D-array die and said peripheral-circuit die; wherein the number of back-end-of-line (BEOL) levels in said 3D-array die is at least twice as much as the number of interconnect levels in said peripheral-circuit die; and, said 3D-array die and said peripheral-circuit die are separate dice.
地址 Corvallis OR US