| 摘要 |
PURPOSE:To obtain a device of this design high in density and integration by a method wherein a gate electrode of a CMOS element is so formed as to be a two-layered structure consisting of an upper and a lower layer through the intermediary of an insulator and both an emitter electrode of a bipolar element and the upper layer gate electrode are formed of polycrystalline silicon the same in quality and thickness. CONSTITUTION:Gate electrodes 112, 113, 117, and 118 of CMOS elements 2 and 3 are so formed as to be a two-layered structure consisting of the lower layers 112 and 113 and the upper layers 117 and 118 provided through the intermediary of an insulator 106. And, an emitter electrode 111 of a bipolar element 1 and the upper layer electrodes 117 and 118 are formed of polycrystalline silicon the same in quality and thickness. Therefore, the gate electrode of the CMOS element can be decreased in resistance value without deteriorating the bipolar element in high frequency property and neither of properties of a bipolar transistor (BipTR) and a MOS transistor (MOSTR) is sacrificed. By these processes, a device high in integration and density can be obtained.
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