发明名称 |
Printed circuit board wiring structure checkup system |
摘要 |
<p>The check system comprises the steps of: computing the optimum position and the optimum capacitance value of the bulk capacitor on a wiring printed circuit board mounting an IC which is an object of checkup, using simple mathematical expressions; determining if an actual capacitance value and an actual position of the bulk capacitor tentatively designed are nearly equal to the optimum value and optimum position computed; determining if the tentatively designed capacitance value of the bulk capacitor exceeds a value of a total sum of capacitance values of decoupling capacitors multiplied by a predetermined constant; and if the optimum conditions are not satisfied, displaying appropriate instructions to modify the tentative design value and position of the bulk capacitor to coincide with the optimum value and position. <IMAGE></p> |
申请公布号 |
EP1168208(A2) |
申请公布日期 |
2002.01.02 |
申请号 |
EP20010115503 |
申请日期 |
2001.06.27 |
申请人 |
SONY CORPORATION |
发明人 |
ARAKI, KENJI;YOKOYAMA, AYAO |
分类号 |
G06F17/50;H05K1/02;H05K3/00;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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