发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To enhance a semiconductor device in memory capacity by a method wherein a first and a second lead address terminal and corresponding control terminals are made to overlap with each other in a vertical direction and connected in common, and a first and a second memory chip are housed in a package separating data input/output terminals from each other. SOLUTION: A DRAM package is equipped with DRAM sub-chips A and B. An address multiplex system is adopted in the sub-chips A and B, and an address space is designated in an alternative way in accordance with 13-bit X address signals X0 to X12 and Y address signals Y0 to Y12 fed in a time division way through the intermediary of 13 address input terminal A0 to A12. The data input pads Din and data output pads Dout of the sub-chips A and B are each connected to the data input terminal Din and data output terminal Dout of the DRAM package in common. The address input pads A0 to A12 of the sub-chips A and B are connected to the address input pads A0 to A12 of the DRAM package in common.
申请公布号 JP3249805(B2) 申请公布日期 2002.01.21
申请号 JP20000139323 申请日期 2000.05.12
申请人 发明人
分类号 H01L25/18;H01L25/065;H01L25/07 主分类号 H01L25/18
代理机构 代理人
主权项
地址