发明名称
摘要 <p>PURPOSE:To process the signal, which is subjected to offset sampling, in accordance with the motion of a frame unit and a field unit. CONSTITUTION:This decoder is provided with a partial detection circuit 101 which detects the extent of motion of a high definition television signal subjected to offset sampling to obtain a motion detection signal, an inter-frame interpolation circuit 102 which obtains an inter-frame motion detection signal by inter- frame interpolation of the motion detection signal, a switching circuit 106 which switches the outputs of a inter-frame interpolation circuit 104 and an intra-field interpolation circuit 105 based on the inter-frame motion detection signal, a field delay circuit 103 which delays the inter-frame motion detection signal by one field to obtain an inter-field motion detection signal, and a switching circuit 109 which switches the outputs of the inter-field interpolation circuit 107 and the intra-field interpolation circuit 108 based on the inter-field interpolation circuit 108 based on the inter-field motion detection signal.</p>
申请公布号 JP3285892(B2) 申请公布日期 2002.05.27
申请号 JP19910151352 申请日期 1991.06.24
申请人 发明人
分类号 H04N7/015;H04N7/00;H04N19/00;H04N19/132;H04N19/137;H04N19/172;H04N19/44;H04N19/59;H04N19/85;(IPC1-7):H04N7/015 主分类号 H04N7/015
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