发明名称 Accessing compressed data of varying-sized quanta in non-volatile memory
摘要 Accessing data of varying-sized quanta in non-volatile memory provides improved storage efficiency in some situations. For example, a Solid-State Disk (SSD) controller receives (e.g. uncompressed) data from a computing host (e.g. a disk write command), compresses the data, and stores the compressed data into non-volatile (e.g. flash) memory. In response to a subsequent request from the host (e.g. a disk read command), the SSD controller reads and uncompresses the compressed data from the memory. The compressed data is stored in the memory according to varying-sized quanta, due to, e.g., compression algorithm, operating mode, and compression effectiveness on various data. The SSD controller uncompresses the data in part by consulting an included map table to locate header(s) stored in the memory, parsing the header(s) to locate appropriate (compressed) data stored in the memory, and uncompressing the appropriate data from the memory to produce the uncompressed data.
申请公布号 US9396104(B1) 申请公布日期 2016.07.19
申请号 US201113053175 申请日期 2011.03.21
申请人 Seagate Technology, LLC 发明人 Danilak Radoslav;Steffko Ladislav;Mullendore Rodney Norman
分类号 G06F12/02;G11C16/10;G06F3/06 主分类号 G06F12/02
代理机构 Tayolor English Duma, LLP 代理人 Tayolor English Duma, LLP
主权项 1. A method comprising: receiving, via a host interface, a Logical Block Address (LBA) from a host, the LBA specifying a Logical Page Number (LPN); accessing one of a plurality of entries of a map associated with the LPN, each entry comprising a read unit address and a length in read units, the read unit address and the length identifying a portion of a non-volatile memory having a size corresponding to the length, and the entry being distinct from the non-volatile memory; reading, via a memory interface, the portion of the non-volatile memory and obtaining an integer number of read units specified at least in part by the length, each of the integer number of read units comprising respective protected data bits and respective error-correcting code bits protecting the respective protected data bits; performing error correction on each of one or more of the integer number of read units based at least in part on the respective error-correcting code bits and the respective protected data bits of the respective one or more of the integer number of read units to produce respective error-corrected read units; parsing one or more headers in at least one of the error-corrected read units; selecting a particular one of the headers associated with the LPN; determining an offset in the at least one of the error-corrected read units based on information in the particular one of the headers associated with the LPN, wherein the information in the particular one of the headers comprises a particular host address associated with the LPN; processing at least a portion of the error-corrected read units starting according to the offset in the at least one of the error-corrected read units to produce processed data; and returning, via the host interface, at least a portion of the processed data in response to the receiving; wherein the LBA is a first LBA, the LPN is a first LPN, the one of a plurality of entries of a map is a first map entry, and a second LBA specifies a second LPN that is different from the first LPN, wherein the second LPN is associated with a second map entry, wherein a read unit address of the first map entry is the same as a read unit address of the second map entry, wherein a single reading of the portion of the non-volatile memory obtains data associated with the first LPN and data associated with the second LPN, and wherein the accessing, the parsing, the selecting, the determining, and the processing are via a controller comprising the entry and coupled to the memory interface and the host interface, and the non-volatile memory, the controller, the memory interface, and the host interface are comprised in a storage device.
地址 Cupertino CA US