Trench IGBT with tub-shaped floating P-well and hole drains to P-body regions

摘要

A trench IGBT has a gate electrode disposed in a trench. A tub-shaped floating P-well is disposed on one side of the trench. The tub-shaped floating P-well has a central shallower portion and a peripheral deeper portion. An inner sidewall of the trench is semiconductor material of the peripheral deeper portion of the floating P-well. On the other side of the trench is a P type body region involving a plurality of deeper portions and a plurality of shallower portions. Each deeper portion extends to the trench such that some parts of the outer sidewall of the trench are semiconductor material of these deeper P-body portions. Other parts of the outer sidewall of the trench are semiconductor material of the shallower P-body portions. A shallow N+ emitter region is disposed at the top of the outer sidewall. The IGBT has fast turn off and enhanced on state conductivity modulation.

主权项

1. A trench Insulated Gate Bipolar Transistor (IGBT) die structure comprising:
a P type collector layer; an N− type drift layer disposed over the P type collector layer; a trench that extends a first distance toward the N− type drift layer from a substantially planar upper semiconductor surface, wherein the trench has an inner sidewall and an outer sidewall and a bottom wall, and wherein the N− type drift layer forms at least a portion of the bottom wall; a P type body region that has a plurality of deeper portions and a plurality of shallower portions, wherein each deeper portion extends a second distance into the N− type drift layer from the substantially planar upper semiconductor surface, wherein each deeper portion forms a part of the outer sidewall of the trench, wherein each shallower portion extends a third distance into the N− type drift layer from the substantially planar upper semiconductor surface, wherein each shallower portion forms a part of the outer sidewall of the trench, wherein the second distance is greater than the third distance, and wherein the second distance is greater than the first distance; an N+ type emitter region, wherein the N+ type emitter region extends into the P type body region from the substantially planar upper semiconductor surface, wherein the N+ type emitter region rings the trench and forms a part of the outer sidewall of the trench; a floating P type well region that extends into the N− type drift layer from the substantially planar upper semiconductor surface, wherein the floating P type well region has a peripheral deeper portion that extends the second distance from the substantially planar upper semiconductor surface toward the N− type drift layer, wherein the floating P type well region has a central shallower portion that extends the third distance from the substantially planar upper semiconductor surface toward the N− type drift layer, wherein the peripheral deeper portion of the floating P type well region rings the central shallower portion of the floating P type well region and extends along the inner sidewall of the trench; a gate insulating film covering a surface of the trench; a trench gate electrode disposed on the gate insulating film; a first metal terminal that is coupled to the P type body region; a second metal terminal that is coupled to the trench gate electrode; and a third metal terminal that is coupled to the P type collector layer.