发明名称 NARROWBAND PHASE-LOCK LOOP CIRCUIT WITH AUTOMATIC CONVERGENCE
摘要 NARROWBAND PHASE-LOCK LOOP CIRCUIT WITH AUTOMATIC CONVERGENCE BY RAYMOND D. FAST AND BRIAN A. MURRAY The phase detector of a phase-lock loop comprises a double balanced mixer that compares the phase of the output signal of the loop oscillator with that of a reference signal and combines the resultant error control voltage with a constant sweep voltage that is stepped at a variable rate. When the loop is out of lock, a counter circuit increments the contents thereof for every n excursions of the difference frequency signal from the phase detector that exceed a prescribed threshold level. A D-A converter converts each unique count to a corresponding constant amplitude step of the stepped sweep voltage. Since the difference between the frequencies of the oscillator and reference signals decreases as the loop approaches lock, the rates at which the counter is incremented and the sweep voltage changes value also decrease. Thus, the loop is swept at a slower rate as the frequencies of the reference and oscillator signals converge. When the loop is locked, the sweep voltage from the converter is maintained at a constant value so that the output signal of the phase detector is the conventional loop error control voltage superimposed on the constant value of sweep voltage.
申请公布号 CA1277376(C) 申请公布日期 1990.12.04
申请号 CA19850479184 申请日期 1985.04.15
申请人 MICROTEL LIMITED 发明人 FAST, RAYMOND D.;MURRAY, BRIAN A.
分类号 H03L7/12 主分类号 H03L7/12
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