METHOD AND EQUIPMENT FOR SYNCHRONIZATION OF ASYNCHRONOUS SIGNAL

摘要

PROBLEM TO BE SOLVED: To provide a technique for synchronizing two or more asynchronous devices or systems to each other without sampling the clock frequencies of the asynchronous devices or systems, but in accordance with the clock edges of the asynchronous devices or systems. SOLUTION: A latching and synchronizing circuit 10 is provided with an inverter matching route delaying block 14, an AND logic gate 18, an OR logic gate 24, and a latch 30. The block 14 and gate 18 forcibly maintain a pulse clock signal 20 in a high logical level state from the rising end of a clock signal 12 until input data signals 28 become stable data. Since the input data signals 28 are not latched into the latch 30 until the signals 28 become stable, the output data signal 32 of the latch 30 represents stable data.