| 摘要 |
PROBLEM TO BE SOLVED: To provide a failure-proof system and its failure detection method which dispense with modification of information processors and which are inexpensive and efficient. SOLUTION: A synchronizing circuit 31 of a synchronizing device 30 is connected with first buses 13 and 23 of the information processors 10 and 20 each provided with CPUs 11, 12, MMs 12, 22, clock supply circuits 14, 24, etc. Plural pieces of information corresponding to a request from the CPUs 11 and 11 are held in buffers 35a and 35b and are collated by the circuit 31. When they are the same, it is judged that no failure occurs in the processors 10 and 20 and a response to the request is returned simultaneously to the processors 10 and 20 to take synchronization.
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