发明名称 TRACKING MEMORY ACCESSES WHEN INVALIDATING EFFECTIVE ADDRESS TO REAL ADDRESS TRANSLATIONS
摘要 According to embodiments of the present disclosure, a method for invalidating an address translation entry in an effective address to real address translation table (ERAT) for a computer memory can include receiving a first invalidation request. According to some embodiments, the method may also include determining that a first entry in the ERAT corresponds with the first invalidation request, wherein the ERAT has a plurality of entries, each entry in the plurality of entries having an indicator. In particular embodiments, the method may then determine that a first indicator associated with the first entry indicates that the first entry is not being used by any of a plurality of memory access entities (MAE), wherein a first MAE can concurrently use a same entry as a second MAE. The first entry may then be invalidated in response to determining that the first entry is not being used.
申请公布号 US2016179698(A1) 申请公布日期 2016.06.23
申请号 US201514727075 申请日期 2015.06.01
申请人 International Business Machines Corporation 发明人 Blaner Bartholomew;Heaslip Jay G.;Lauricella Kenneth A.;Stuecheli Jeffrey A.
分类号 G06F12/10 主分类号 G06F12/10
代理机构 代理人
主权项 1. A method for invalidating an address translation entry in an effective address to real address translation table (ERAT) for a computer memory, the method comprising: receiving a first invalidation request; determining that a first entry in the ERAT corresponds with the first invalidation request, wherein the ERAT has a plurality of entries, each entry in the plurality of entries having an indicator; determining that a first indicator associated with the first entry indicates that the first entry is not being used by any of a plurality of memory access entities (MAE), wherein a first MAE can concurrently use a same entry as a second MAE; and invalidating the first entry in response to determining that the first entry is not being used.
地址 Armonk NY US