发明名称 Decoupling capacitors for interposers
摘要 Embodiments of the invention generally relate to interposers for packaging integrated circuits. The interposers include capacitive devices for reducing signal noise and leakage between adjacent integrated circuits coupled to the interposers. The capacitive devices are formed from doped semiconductor layers. In one embodiment, an interposer includes a substrate having doped regions of opposing conductivities. First and second oxide layers are disposed over the doped regions. A first interconnect disposed in the second oxide layer is electrically coupled to a doped region of a first conductivity, and a second interconnect disposed in the second oxide is electrically coupled to a doped region of a second conductivity. Additional capacitive devices utilizing doped semiconductor layers are also disclosed.
申请公布号 US9379202(B2) 申请公布日期 2016.06.28
申请号 US201213674533 申请日期 2012.11.12
申请人 NVIDIA CORPORATION 发明人 Yee Abraham F.
分类号 H01L29/92;H01L29/66;H01L27/08;H01L29/94 主分类号 H01L29/92
代理机构 Artegis Law Group, LLP 代理人 Artegis Law Group, LLP
主权项 1. A device, comprising: an interposer, the interposer including: a capacitive device, including: a substrate having a first conductivity type;a doped region of the first conductivity type on an upper surface of the substrate;a doped region of a second conductivity type on the upper surface of the substrate;a first oxide layer disposed over the upper surface of the substrate, the first oxide layer having openings therethrough to expose a portion of the doped region of the first conductivity type and a portion of the doped region of the second conductivity type;a second oxide layer disposed over the first oxide layer; anda plurality of interconnects formed within vias disposed in the second oxide layer; anda support surface adapted to support a plurality of integrated circuits thereon, wherein the capacitive device decouples at least a first integrated circuit of the plurality of integrated circuits from a second integrated circuit of the plurality of integrated circuits.
地址 Santa Clara CA US