| 主权项 |
1. A method for fabricating a semiconductor device, the method comprising:
forming a threshold voltage adjust region under a surface of a first region of a substrate that includes the first region and a second region; forming a gate dielectric layer over the first region and the second region; forming a first metal-containing layer containing a first effective work function adjust species over the gate dielectric layer formed over first region; forming a second metal-containing layer containing a second effective work function adjust species over the gate dielectric layer formed over the second region and over the first metal-containing layer; forming a dipole formation region at an interface between the second metal-containing layer and the gate dielectric layer; forming an effective work function promotion layer at an interface between the first metal-containing layer and the second metal-containing layer; forming, in the first region, a first gate stack structure by etching the second metal-containing layer, the effective work function promotion layer, the first metal-containing layer, and the gate dielectric layer; and forming, in the second region, a second gate stack structure by etching the second metal-containing layer, the dipole formation layer, and the gate dielectric layer, wherein the forming the dipole formation layer comprises:
forming a buffer layer over the second metal-containing layer;forming a mask pattern over the buffer layer, the mask pattern opening the second region; andimplanting, via the mask pattern, a second element into a portion of the second metal-containing layer. |
