| 摘要 |
An image synthesizer which can achieve the high-speed operation and downsizing of hardware by the use of thinning-out/interpolation means. A processor portion (30) determines coordinates of each dot inside a polygon and the corresponding texture coordinates on the basis of apex image data. The texture coordinates are stored at an address designated by the coordinates of each dot in a field buffer portion (40). The texture coordinates are read out from the field buffer portion, while rendering data is read out from a texture data memory portion (42) on the basis of these texture coordinates, so that a pseudo-three-dimensional image is synthesized and outputted. In this case, the processor portion (30) includes a thinning-out operation portion. The texture coordinates of the thinned-out dot are determined by interpolation circuits (180 - 186) on the basis of the texture coordinates of both adjacent dots. |
