| 摘要 |
PURPOSE: A method for manufacturing a shallow trench for a semiconductor isolation is provided to have an upper corner portion of an insulating layer have a low step difference and become rounded, by slope-etching the insulating layer using a pattern critical dimension(CD) loss in a reverse moat etching process. CONSTITUTION: A pad oxidation layer(12) and a nitride layer(13) are formed on a silicon wafer(11). After a moat mask is formed on the nitride layer, the nitride layer and pad oxidation layer exposed through the moat mask are etched, and the exposed silicon wafer is etched by a predetermined depth to form a trench. The moat mask is eliminated, and the silicon wafer is thermally processed to form a liner oxidation layer. An insulating layer is evaporated on the entire surface of the silicon wafer to fill the trench and perform an annealing process. A reverse moat mask(17) is formed on the insulating layer, and the insulating layer(16) exposed through the reverse moat mask is slope-etched. The reverse moat mask is eliminated, and the reverse moat etched insulating layer is planarized by a chemical mechanical polishing(CMP) process using the nitride layer as a stop layer.
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