发明名称 |
FERROELECTRIC RANDOM ACCESS MEMORY HAVING BIT LINE CHARGE PUMPING CIRCUIT |
摘要 |
PURPOSE: A FRAM(Ferroelectric Random Access Memory) having a bit line charge pumping circuit is provided which embodies a stable data sensing operation, using a bit line charge pumping circuit without using a dummy cell. CONSTITUTION: A FRAM(Ferroelectric Random Access Memory) includes: a ferroelectric memory cell(440) connected to a word line and a bit line; a reference voltage generating part(480) to generate a reference voltage signal(Vref); a bit line charge pumping part(400) for charge-pumping the bit line signal generated by charge-sharing with a cell storage node up to a voltage level adjacent to the reference voltage signal; and a sensing amplification part(410) to compare and amplify the reference voltage signal and the charge-pumped bit line signal. The FeRAM prevents the fatigue of the device generated due to a dummy cell by generating the reference voltage using an additional reference voltage generator without using the dummy cell, and makes the bit line signal be sensed stably using the bit line charge pumping circuit.
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申请公布号 |
KR20000073689(A) |
申请公布日期 |
2000.12.05 |
申请号 |
KR19990017133 |
申请日期 |
1999.05.13 |
申请人 |
HYUNDAI ELECTRONICS IND. CO.,LTD |
发明人 |
KIM, DEOK JU;KIM, JAE HWAN |
分类号 |
G11C14/00;G11C7/06;G11C7/18;G11C11/22;G11C11/40;(IPC1-7):G11C11/40 |
主分类号 |
G11C14/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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