发明名称 APPARATUS FOR COMPENSATING FOR CLOCK DELAY
摘要 PURPOSE: A clock delay compensating device is provided which reduces consumption current and compensates for clock delay in a switch connecting devices using different clocks in a high speed switch. CONSTITUTION: A clock delay compensating device includes a receiver(21) for receiving data from a subscriber connection part and sending the data and reception clock to a buffer, a first inverter for inverting the reception clock, a reference clock generator for generating a reference clock and a second inverter for inverting the reference clock. The device also includes a reference cell start signal generator for generating a reference cell start signal, a buffer(23) for receiving the clock from the first inverter, the data from the receiver and the clock from the second inverter, outputting a status signal according to data storage amount and recording and reading data, and a buffer controller(24) for sending a record signal read signal among the cell start signal, reception clock, reference clock and reference cell start signal to the buffer.
申请公布号 KR20000073612(A) 申请公布日期 2000.12.05
申请号 KR19990017017 申请日期 1999.05.12
申请人 SAMSUNG ELECTRONICS CO, LTD. 发明人 CHO, HUI CHANG
分类号 H03K5/135;(IPC1-7):H03K5/135 主分类号 H03K5/135
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