发明名称 Method and apparatus for analyzing clock-delay, and computer product
摘要 An input unit receives circuit information on a circuit. A first calculating unit calculates delay-distribution information of a data path and delay-distribution information of a clock path, based on the circuit information. A second calculating unit calculates delay-difference-distribution information between the data path and the clock path by using the delay-distribution information of the data path and the delay-distribution information of the clock path. A third calculating unit calculates a clock-delay value of the circuit based on the delay-difference-distribution information.
申请公布号 US7308665(B2) 申请公布日期 2007.12.11
申请号 US20050167311 申请日期 2005.06.28
申请人 FUJITSU LIMITED 发明人 HOMMA KATSUMI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址