CLOCK AND DATA RECOVERY CIRCUIT USING DIGITAL FREQUENCY DETECTION

摘要

A clock and data recovery circuit is disclosed herein. The clock and data recovery circuit includes a phase detection unit, a charge pump, a loop filter, a voltage control oscillator, and a frequency detection unit. The voltage control oscillator has oscillation frequency that is variable in response to a frequency adjustment signal, and outputs an oscillation signal. The frequency detection unit includes a reference clock divider, a counter, and an oscillation frequency control unit. The reference clock divider generates a count-enable signal based on a reference clock signal. The counter generates an oscillation count signal by counting the pulses of the oscillation signal of the voltage control oscillator or the pulses of divided signals resulting from dividing the oscillation signal while the count-enable signal is being enabled. The oscillation frequency control unit compares a target count value with the value of the oscillation count signal, and outputs the frequency adjustment signal.

主权项

1. A clock and data recovery circuit, comprising a phase detection unit, a charge pump, a loop filter, a voltage control oscillator, and a frequency detection unit,
wherein the voltage control oscillator has oscillation frequency that is variable in response to a frequency adjustment signal, and outputs an oscillation signal; and wherein the frequency detection unit comprises: a reference clock divider configured to generate a count-enable signal from a reference clock signal according to a reference division ratio; a counter configured to generate an oscillation count signal so that the oscillation count signal has a value that is obtained by counting a number of pulses of the oscillation signal of the voltage control oscillator or a number of pulses of divided signals resulting from dividing the oscillation signal while the count-enable signal is being enabled; and an oscillation frequency control unit configured to compare a target count value, determined based on a target frequency of the oscillation signal, with a value of the oscillation count signal, and to output the frequency adjustment signal.