发明名称 |
Self-aligned contacts and methods of fabrication |
摘要 |
Embodiments of the present invention provide an improved contact and method of fabrication. A dielectric layer is formed over transistor structures which include gates and source/drain regions. A first etch, which may be a reactive ion etch, is used to partially recess the dielectric layer. A second etch is then used to continue the etch of the dielectric layer to form a cavity adjacent to the gate spacers. The second etch is highly selective to the spacer material, which prevents damage to the spacers during the exposure (opening) of the source/drain regions. |
申请公布号 |
US9460963(B2) |
申请公布日期 |
2016.10.04 |
申请号 |
US201414225529 |
申请日期 |
2014.03.26 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
Wells Gabriel Padron;Hu Xiang;Bouche Guillaume;Labonte Andre |
分类号 |
H01L21/467;H01L21/768;H01L29/40;H01L21/033;H01L21/308;H01L29/417;H01L27/088;H01L21/8234 |
主分类号 |
H01L21/467 |
代理机构 |
Williams Morgan, P.C. |
代理人 |
Williams Morgan, P.C. |
主权项 |
1. A method of forming a semiconductor structure, comprising:
forming a plurality of gates on a semiconductor substrate; forming a plurality of source/drain regions adjacent to the plurality of gates; forming a nitride layer over the plurality of gates, wherein the nitride layer is not in contact with the plurality of source/drain regions; forming a dielectric layer over the nitride layer; forming a first mask layer on the dielectric layer; forming a second mask layer on the first mask layer; patterning the second mask layer; performing an etch of the first mask layer; performing a first etch of the dielectric layer to a level above the source/drain regions; and performing a second etch of the dielectric layer to expose the source/drain regions. |
地址 |
Grand Cayman KY |