发明名称 |
Wrap-around gate field effect transistor |
摘要 |
A field effect transistor is formed having wrap-around, vertically-aligned, dual gate electrodes. Starting with an silicon-on-insulator (SOI) structure having a buried silicon island, a vertical reference edge is defined, by creating a cavity within the SOI structure, and used during two etch-back steps that can be reliably performed. The first etch-back removes a portion of an oxide layer for a first distance over which a gate conductor material is then applied. The second etch-back removes a portion of the gate conductor material for a second distance. The difference between the first and second distances defines the gate length of the eventual device. After stripping away the oxide layers, a vertical gate electrode is revealed that surrounds the buried silicon island on all four side surfaces.
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申请公布号 |
US7271444(B2) |
申请公布日期 |
2007.09.18 |
申请号 |
US20030732958 |
申请日期 |
2003.12.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FURUKAWA TOSHIHARU;HAKEY MARK CHARLES;HORAK DAVID VACLAV;KOBURGER, III CHARLES WILLIAM;MITCHELL PETER H. |
分类号 |
H01L21/334;H01L29/76;H01L21/336;H01L29/41;H01L29/423;H01L29/49;H01L29/786 |
主分类号 |
H01L21/334 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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