发明名称 Return-to-hold switching scheme for DAC output stage
摘要 A novel clock control circuit completely removes the inter-symbol interference (ISI) in the DAC output waveform without any significant increase in power consumption and silicon area of the DAC. The novel circuit does not increase the requirement for slew rate and bandwidth of the amplifier.
申请公布号 US7307568(B1) 申请公布日期 2007.12.11
申请号 US20060476476 申请日期 2006.06.28
申请人 ANALOG DEVICES, INC. 发明人 NHUYEN KHIEM
分类号 H03M1/66 主分类号 H03M1/66
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