Electrostatic protection circuit, display device and electrostatic protection method

摘要

An electrostatic protection circuit, a display device and an electrostatic protection method are provided. The electrostatic protection circuit includes a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, and a fifth switch transistor. A gate electrode and a first electrode of the first switch transistor are connected with a first signal line respectively, and a second electrode of the first switch transistor is connected with a second signal line; a gate electrode and a first electrode of the second switch transistor are connected with the first signal line respectively, and a second electrode of the second switch transistor is connected with a gate electrode of the fourth switch transistor; a gate electrode and a first electrode of the third switch transistor are connected with a third signal line respectively, and a second electrode of the third switch transistor is connected with the gate electrode of the fourth switch transistor; a first electrode of the fourth switch transistor is connected with the third signal line, a second electrode of the fourth switch transistor is connected with a second electrode of the fifth switch transistor and the gate electrode of the second switch transistor; a gate electrode and a first electrode of the fifth switch transistor being connected with the second signal line respectively, thereby effectively releasing static electricity.

主权项

1. An electrostatic protection circuit comprising a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, and a fifth switch transistor;
a gate electrode and a first electrode of the first switch transistor being connected with a first signal line respectively, and a second electrode of the first switch transistor being connected with a second signal line; a gate electrode and a first electrode of the second switch transistor being connected with the first signal line respectively, and a second electrode of the second switch transistor being connected with a gate electrode of the fourth switch transistor; a gate electrode and a first electrode of the third switch transistor being connected with a third signal line respectively, and a second electrode of the third switch transistor being connected with the gate electrode of the fourth switch transistor; a first electrode of the fourth switch transistor being connected with the third signal line, and a second electrode of the fourth switch transistor being connected with a second electrode of the fifth switch transistor and the gate electrode of the second switch transistor respectively; and a gate electrode and a first electrode of the fifth switch transistor being connected with the second signal line respectively, and the second electrode of the fifth switch transistor being connected with the gate electrode of the second switch transistor; wherein the first signal line and the second signal line are disposed adjacently to each other, and the first signal line and the second signal line are both scanning lines; or the first signal line and the second signal line are disposed adjacently to each other, and the first signal line and the second signal line are both data lines; and wherein the third signal line is one of a common line and a short ring.