Phase frequency detector circuit

摘要

A phase frequency detector circuit includes an edge detector circuit, a plurality of phase frequency detector sub-circuits, and a decision circuit. The edge detector circuit is configured to receive a first input signal and a second input signal. The decision circuit is configured to detect whether a blind condition exits based on outputs of the edge detector circuit and outputs of the plurality of phase frequency detector sub-circuits. Responsive to a result of the decision circuit, a corresponding frequency detector sub-circuit of the plurality of phase frequency detector sub-circuit is configured to provide signals for use in determining a phase difference between the first input signal and the second input signal.

主权项

1. A phase frequency detector circuit comprising:
an edge detector circuit; a plurality of phase frequency detector sub-circuits; and a decision circuit, wherein
the edge detector circuit is configured to receive a first input signal and a second input signal;the decision circuit is configured to detect whether a blind condition exits based on output signals of the edge detector circuit and output signals of the plurality of phase frequency detector sub-circuits;responsive to a result of the decision circuit, a corresponding phase frequency detector sub-circuit of the plurality of phase frequency detector sub-circuits is configured to provide signals for use in determining a phase difference between the first input signal and the second input signal, a first phase frequency detector sub-circuit of the plurality of phase frequency detector sub-circuits is configured to generate a first output signal based on the first output signal of the output signals of the edge detector circuit, a second output signal based on the second output signal of the output signals of the edge detector circuit, a third output signal based on the third output signal of the output signals of the edge detector circuit, and a fourth output signal based on the fourth output signal of the output signals of the edge detector circuit; and a second phase frequency detector sub-circuit of the plurality of phase frequency detector sub-circuits is configured to generate a first output signal based on the third output signal of the output signals of the edge detector circuit, a second output signal based on the second output signal of the output signals of the edge detector circuit, a third output signal based on the first output signal of the output signals of the edge detector circuit, and a fourth output signal based on the fourth output signal of the output signals of the edge detector circuit.