发明名称 Method and system for emulating a circuit under test associated with a test environment
摘要 Method for emulating a circuit under test (DUT) in a test environment comprises two distinct generation phases: a first (80) in which a first file (FCH1) is generated for configuring the test environment and a second in which a DUT configuration file (FCH2) is generated. The two files are delivered to first (BTR) and second (EML) distinct and mutually connected parts of reconfigurable hardware forming a test-bed. Independent claims are also included for the following:- (a) an emulation system for configuration and emulation of a circuit under test; (b) an expansion card, containing a reconfigurable test-bed, that can be connected to the system board of a host computer.
申请公布号 EP1376417(A1) 申请公布日期 2004.01.02
申请号 EP20030291452 申请日期 2003.06.16
申请人 EMULATION AND VERIFICATION ENGINEERING 发明人 BERGUN, LUC;REYNIER, DAVID;DELERSE, SEBASTIEN;EMIRIAN, FREDERIC;DOUEZY, FRANCOIS
分类号 G06F11/26;G01R31/3183;G06F17/50 主分类号 G06F11/26
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