发明名称 Error detection and correction for external DRAM
摘要 One embodiment of the present invention sets forth a technique for protecting data with an error correction code (ECC). The data is accessed by a processing unit and stored in an external memory, such as dynamic random access memory (DRAM). Application data and related ECC data are advantageously stored in a common page within a common DRAM device. Application data and ECC data are transmitted between the processor and the external common DRAM device over a common set of input/output (I/O) pins. Eliminating I/O pins and DRAM devices conventionally associated with transmitting and storing ECC data advantageously reduces system complexity and cost.
申请公布号 US9490847(B2) 申请公布日期 2016.11.08
申请号 US201213660737 申请日期 2012.10.25
申请人 NVIDIA Corporation 发明人 Gruner Fred;Keil Shane;Montrym John S.
分类号 G11C29/00;H03M13/13;G06F11/10;H03M13/00 主分类号 G11C29/00
代理机构 Artegis Law Group, LLP 代理人 Artegis Law Group, LLP
主权项 1. A method for accessing a memory unit, the method comprising: receiving a first data access request associated with a first data sector included in a page within the memory unit, a second data access request associated with a second data sector included in the page, and an error correction code (ECC) access request associated with an ECC sector corresponding to the first data sector and the second data sector; accessing the first data sector to process the first data access request; accessing the second data sector to process the second data access request; and accessing the ECC sector only once when performing an operation on ECC data stored in the ECC sector, wherein the ECC data corresponds to data associated with the first data access request and data associated with the second data access request.
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