| 摘要 |
Disclosed is a semiconductor memory having memory cells, each containing a selection transistor and a capacitor using a ferroelectric film, which memory can be operated in both volatile and nonvolatile modes (e.g., a shadow RAM). A common plate electrode is used for the capacitors of the plurality of memory cells, and this common plate electrode is held at a fixed (constant) voltage. The memory has two data lines for each memory cell, and a sense amplifier connected between the two data lines. Volatile or nonvolatile operation is established depending on the voltage applied to the amplifier. The voltage applied to the amplifier is increased and the ferroelectric capacitor is completely polarized to write nonvolatile information; to write volatile information, this voltage is decreased and polarization reversal is minimized. The memory can have a mode switching circuit which changes the power supply voltage to the amplifier, to change mode of operation between volatile and nonvolatile modes, and an internal voltage generator to generate voltages, inter alia, for read and write in both the volatile and nonvolatile modes of operation. The memory performs store and recall operations at a high speed and decreased power consumption; and fatigue of the ferroelectric capacitor when performing volatile write decreases, and the number of rewritings can be increased.
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