MEMORY ARRAY AND STORAGE METHOD

摘要

The invention relates to a memory array comprising a first memory transistor (11) for the non-volatile storage of a first bit, a second memory transistor (17) for the non-volatile storage of the first bit in inverted form and a word line (29) that is connected to a control connection (12) of the first memory transistor (11) and to a control connection (18) of the second memory transistor (17). The memory array also comprises a read amplifier (23) with a first input (24), which is coupled to the first memory transistor (11) for supplying a first bit line signal (BL1), a second input (25), which is coupled to the second memory transistor (17) for supplying a second bit line signal (BL2) and an output (26) for the provision of an output signal (SOUT) in accordance with the first bit line signal (BL1) and the second bit line signal (BL2).