Enhancement-depletion mode inverter with two transistor architectures

摘要

An enhancement-depletion-mode inverter includes a load transistor and a drive transistor. The load transistor has a top gate architecture with a first source, a first drain, a load channel region, a first semiconductor layer, and a first gate electrode. A load gate dielectric is in the load channel region, and has a load dielectric thickness. The load transistor is configured to operate in a depletion mode. The drive transistor has a bottom gate architecture with a second source, a second drain, a drive channel region, a second semiconductor layer, and a second gate electrode. A drive gate dielectric is in the drive channel region, and has a drive dielectric thickness that is different from the load dielectric thickness. The drive transistor is configured to operate in a normal mode or an enhancement mode. The first source is electrically connected to the second drain and the first gate.

主权项

1. An enhancement-depletion-mode inverter comprising:
a load transistor, having a top gate architecture with a first source, a first drain, a load channel region, a load gate dielectric in the load channel region having a load dielectric thickness, a first semiconductor layer, and a first gate electrode, the load transistor operating in a depletion mode; and a drive transistor having a bottom gate architecture with a second source, a second drain, a drive channel region, a drive gate dielectric in the drive channel region having a drive dielectric thickness that is different from the load dielectric thickness, a second semiconductor layer and a second gate electrode, the drive transistor operating in a normal mode or enhancement mode; wherein the first source is electrically connected to the second drain and the first source is electrically connected to the first gate, and wherein the load gate dielectric and the drive gate dielectric are part of a common shared dielectric stack, and wherein the common shared dielectric stack includes a plurality of layers, and wherein one of the plurality of layers has a different pattern than another of the plurality of layers.