发明名称 Electro-optical unit with pixel circuit of reduced area
摘要 An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
申请公布号 US9430971(B2) 申请公布日期 2016.08.30
申请号 US201213606876 申请日期 2012.09.07
申请人 SONY CORPORATION 发明人 Tsukamoto Kouzi;Takeda Kazuhiro;Urakawa Takamitsu;Andou Naoki;Ono Kazutoshi
分类号 G09G3/34;G09G3/36 主分类号 G09G3/34
代理机构 Dentons US LLP 代理人 Dentons US LLP
主权项 1. An electro-optical unit, comprising a pixel corresponding to a portion where first and second data lines intersect a gate line, the pixel including (a) an electro-optical device, and (b) a pixel circuit connected to the electro-optical device, wherein: the pixel circuit has (a) a holding circuit connected to the first and second data lines and the gate line, and(b) a selection circuit connected to the holding circuit and the electro-optical device, the holding circuit is configured to (a) sample a first image signal to be applied to the first data line based on a writing selection signal to be applied to the gate line and hold a first sampling signal of the first image signal via a static random access memory (SRAM), and (b) sample a second image signal to be applied to the second data line based on the writing selection signal to be applied to the gate line and hold a second sampling signal of the second image signal via the SRAM, the selection circuit is configured to (a) receive the first sampling signal of the first image signal from the holding circuit via a first signal line and selectively output the first sampling signal under control of first output selection signals and (b) receive the second sampling signal of the second image signal from the holding circuit via a second signal line and selectively output the second sampling signal under control of second output selection signals, the selection circuit selectively outputting the first and second sampling signals to the electro-optical device, and the first signal line has an end electrically connected between the first data line and the SRAM and the second signal line has an end electrically connected between the second data line and the SRAM.
地址 Tokyo JP