BOOSTED VOLTAGE GENERATOR OF SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To reduce a chip size by properly arranging a boosted voltage generator. SOLUTION: A memory array is divided into a number of banks 21-24 and boosted voltage generators 25-27 which are less than the number of banks are arranged and are controlled by control signals A0-A(m-1) by a control circuit 30. The control circuit 30 generates control signals A0-A(m-1) according to a refresh signal PRFH and row address signals RA-0-RA-(n-1). A boosting operation can be made easily using less number of boosted voltage generators than the number of banks by successively switching when the bank is active, thus reducing the number of boosted voltage generators and hence improving integration.