III-V, SiGe, or Ge base lateral bipolar transistor and CMOS hybrid technology

摘要

In one aspect, a method of fabricating a bipolar transistor device on a wafer includes the following steps. A dummy gate is formed on the wafer, wherein the dummy gate is present over a portion of the wafer that serves as a base of the bipolar transistor. The wafer is doped to form emitter and collector regions on both sides of the dummy gate. A dielectric filler layer is deposited onto the wafer surrounding the dummy gate. The dummy gate is removed selective to the dielectric filler layer, thereby exposing the base. The base is recessed. The base is re-grown from an epitaxial material selected from the group consisting of: SiGe, Ge, and a III-V material. Contacts are formed to the base. Techniques for co-fabricating a bipolar transistor and CMOS FET devices are also provided.

主权项

1. A method of fabricating a bipolar transistor device on a wafer, the method comprising the steps of:
forming a dummy gate on the wafer, wherein the dummy gate is present over a portion of the wafer that serves as a base of the bipolar transistor; doping the wafer to form emitter and collector regions on both sides of the dummy gate; depositing a dielectric filler layer onto the wafer surrounding the dummy gate; removing the dummy gate selective to the dielectric filler layer, thereby exposing the base; recessing the base; re-growing the base from an epitaxial material selected from the group consisting of: SiGe, Ge, and a III-V material; and forming contacts to the base by depositing a polysilicon layer onto the wafer covering the bipolar transistor device; patterning the polysilicon layer such that the polysilicon layer remains only on the base; depositing a metal onto the wafer; reacting the metal with the patterned polysilicon layer to form the contacts to the base; and removing any unreacted metal.