发明名称 Wiring connection structure for a semiconductor integrated circuit device
摘要 A wiring connection structure for a semiconductor integrated circuit device interconnects a plurality of wiring layers isolated by an insulating layer, via a through hole defined in the insulating layer. The wiring connection structure comprises a semiconductor substrate, a first insulating layer, a first wiring layer, a second insulating layer and a second wiring layer. The first insulating layer is formed on a main surface of the semiconductor substrate. The first wiring layer is formed on the first insulating layer. The second insulating layer is formed on the first wiring layer. The through hole is formed in the second insulating layer so as to extend to a surface of the first wiring layer. The second wiring layer is formed on the second insulating layer and connected to the first wiring layer via the through hole. The through hole is a single through hole formed in a region where the second wiring layer overlaps with the first wiring layer. The through hole has a cross section comprising a figure formed by indenting peripheries of a single rectangular figure. This cross section has a longer perimeter than the single rectangular figure. Alternatively, the cross section comprises a figure formed by interconnecting band portions extending along the second wiring layer. A reduction is achieved in components of resistance over an entire through hole forming region. Concentration of current density on side walls of the through hole is also mitigated.
申请公布号 US5200807(A) 申请公布日期 1993.04.06
申请号 US19900520482 申请日期 1990.05.08
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 EGUCHI, KOJI
分类号 H01L21/3205;H01L21/768;H01L23/522;H01L23/528 主分类号 H01L21/3205
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