发明名称 ATM CELL PROCESSING CIRCUIT
摘要 <p>PURPOSE:To prevent occurrence of impartial cell abort in response to an input/ output timing in a buffer memory in the case of circuit configuration of a multiplexer circuit implementing periodic time division multiplexing. CONSTITUTION:After cell multiplexing by periodic time division multiplexing, whether a cell in a buffer memory 2 through an outgoing line L8 is to be received or aborted is discriminated by taking the relation between a threshold level and a cell number to the outgoing line and in the buffer memory in a timing just after cells of the outgoing line are read out of the buffer memory by a buffer control circuit 0 into account, that is, by comparing a content of a counter 03 with a content of a register 07 at a comparator 08. That is, when the cell number in the buffer memory in the timing exceeds the threshold level, the input cell is aborted, and when not exceeded, the cell is inputted to the buffer memory even when the cell number in the buffer memory exceeds the threshold level. Thus, whether the input cell is stored in the buffer memory or aborted is decided and cell abort is implemented impartially regardless of the relation between an incoming line L7 and the outgoing line L8.</p>
申请公布号 JPH0685832(A) 申请公布日期 1994.03.25
申请号 JP19920235623 申请日期 1992.09.03
申请人 HITACHI LTD 发明人 MORI MAKOTO;OZAKI NAOHIKO;WATANABE KAZUHIRO;ITO YUTAKA
分类号 H04Q11/04;H04L12/28;(IPC1-7):H04L12/48 主分类号 H04Q11/04
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