发明名称 ANALOG DEMULTIPLEXER
摘要 The analog demultiplexer (FIG. 6 ) includes an input amplifier (A<SUB>1</SUB>), and output amplifiers (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>). The output and inverting (-) input of amplifiers (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>) are connected by a respective capacitor (C<SUB>1</SUB>-C<SUB>N</SUB>). Switches (S<SUB>1a</SUB>, S<SUB>1b</SUB>, etc.) connect the output of amplifier (A<SUB>1</SUB>) to the inverting input of one of (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>). Switches (S<SUB>2a</SUB>, S<SUB>2b</SUB>, etc.) connect the output of one of (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>) to the non-inverting input of the amplifier A<SUB>1</SUB>. Switches (S<SUB>2a</SUB>, S<SUB>2b</SUB>, etc.) and (S<SUB>1a</SUB>, S<SUB>1b</SUB>, etc.) open and close together in pairs. With feedback from the output of (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>) through (A<SUB>1</SUB>), the gain and any offset of (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>) is divided down by the gain of (A<SUB>1</SUB>). Amplifier (A<SUB>1</SUB>) has capacitors (C<SUB>S1 </SUB>and C<SUB>S2</SUB>) connected to its inputs. Switch (S<SUB>50</SUB>) connects the inverting input of amplifier (A<SUB>1</SUB>) to its output, and switch (S<SUB>40</SUB>) connects the non-inverting input of (A<SUB>1</SUB>) to a voltage reference (V<SUB>REF</SUB>) matching (V<SUB>REF</SUB>) applied to (AMP<SUB>2</SUB>). Switches (S<SUB>30</SUB>) and (S<SUB>35</SUB>) connect (C<SUB>S1</SUB>) and (C<SUB>S2</SUB>) to the demultiplexer input ( 2 ). In operation, switches (S<SUB>40</SUB>, S<SUB>50</SUB>, S<SUB>30 </SUB>and S<SUB>35</SUB>) are initially closed, while switches (S<SUB>2a</SUB>, S<SUB>2b</SUB>, etc.) are open to charge both capacitors (C<SUB>S1</SUB>) and (C<SUB>S2</SUB>) and the inputs and output of (A<SUB>1</SUB>) to (V<SUB>REF</SUB>). Switch (S<SUB>50</SUB>) provides feedback to divide down gain errors and offset of (A<SUB>1</SUB>). Switches (S<SUB>30</SUB>, S<SUB>35</SUB>, S<SUB>40 </SUB>and S<SUB>50</SUB>) are then open, while one of switches (S<SUB>2a</SUB>, S<SUB>2b</SUB>, etc.) is closed with one switch (S<SUB>1a</SUB>, S<SUB>1b</SUB>, etc) to drive one of the output voltages (V<SUB>OUT1</SUB>-V<SUB>OUTN</SUB>). With inputs and outputs of (A<SUB>1</SUB>) and the connected (AMP<SUB>1</SUB>-AMP<SUB>N</SUB>) initially be at (V<SUB>REF</SUB>), very little settling time is needed.
申请公布号 KR20040033025(A) 申请公布日期 2004.04.17
申请号 KR20047003403 申请日期 2002.09.05
申请人 发明人
分类号 H03K17/62;H03F3/72;H03K17/00;H03K17/16;H03K17/693 主分类号 H03K17/62
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