| 摘要 |
PROBLEM TO BE SOLVED: To facilitate changing the size of a redundancy address memory and to enable designing a memory according to the specifications of the kind of device, in a short time. SOLUTION: A memory mat 1, consisting of EEPROM memories, has a redundancy memory region 3 for replacing a memory region having defects produced in a main memory region 2. The main feature of this circuit is a redundancy address memory region 4 storing address data of a defective memory region being provided in one part of an inforow memory region 5 in the memory mat 1. The inforow memory region 5 is constituted, so as to be able to access only at the time of a testing mode. |
