发明名称 LAYERED SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To achieve favorable noise reduction effect of a high-frequency power source.SOLUTION: A layered semiconductor device comprises a plurality of integrated circuit chips 2 layered on a substrate 1. Each of power supply target chips 2B-2D out of the plurality of integrated circuit chips includes a power source terminal 3 and a ground terminal 4 which are respectively connected to decoupling power source-side through electrode wiring 5 and decoupling ground-side through electrode wiring 6, in which the decoupling power source-side through electrode wiring and the decoupling ground-side through electrode wiring compose a decoupling through electrode transmission line 7. The layered semiconductor device further comprises resistance 8 and capacitance 9 which are equivalent with characteristic impedance of the decoupling through electrode transmission line and series connected on the integrated circuit chip located at a dead end of the decoupling through electrode transmission line.SELECTED DRAWING: Figure 1
申请公布号 JP2016143853(A) 申请公布日期 2016.08.08
申请号 JP20150021119 申请日期 2015.02.05
申请人 FUJITSU LTD 发明人 NAGAI TOSHIAKI
分类号 H01L25/065;H01L25/07;H01L25/18 主分类号 H01L25/065
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